In the display panel industry, mura, referring to non-uniformity of a display panel in terms of luminance, is always a problem to be solved. Mura may result from inability to perform consistent and satisfactory manufacturing process control, such as control of a vapor deposition process for OLED panels, a mass transfer process for micro LED panels, etc. Therefore, multiple demura (i.e., mura correction or elimination) technologies have been developed to alleviate the mura effect for the display panel. In one conventional demura technology, polynomial approximation is used to, for each sub-pixel of the display panel, obtain a fitting curve that fits a relationship between grayscale code (also called gray level) and luminance of the sub-pixel, and a voltage or current output to the sub-pixel is adjusted based on a difference between the fitting curve and a desired curve that represents a desired relationship between grayscale code and luminance for all sub-pixels corresponding to the same color element, so as to minimize deviation of the actual output luminance of the sub-pixel from the desired luminance for the same sub-pixel. However, traditional polynomial approximation usually fails to fit the relationship between grayscale code and luminance of the sub-pixel well, leading to poor demura outcome.
Furthermore, in one conventional implementation, the demura operation is performed by the source driver ICs with its memory and logic circuits. Because of their limited memory capacity and poor computation ability, the source driver ICs can only implement simple demura algorithm so the demura result is usually not satisfactory.